1. Field of the Invention
The present invention generally relates to a timing reproduction device that reproduces a timing signal from a received signal in a communications system. The present invention is suitably applicable to a modulator/demodulator device (modem) in communications devices, such as a data transmission device and a facsimile device.
2. Description of the Prior Art
In communications systems, a timing reproduction device is used which extracts, from a received signal, a timing error between signals transmitted between a transmitter and a receiver and reproduces a timing signal used in the transmitter on the receiver side in order to synchronize the receiver with the transmitter.
FIG. 1 is a block diagram of a conventional timing reproduction device disclosed in Kaga, "INTERFACE", CQ Shuppan-sha, April, 1986. The timing reproduction device shown in FIG. 1 converts an analog received via a transmission medium by an analog-to-digital (A/D) converter 501. A digital signal output by the A/D converter 501 is demodulated by a demodulator 502. A demodulated digital signal from the demodulator 502 is converted into baseband signals a.sub.1 and a.sub.2 by receiving filters 503 and 504. The baseband signals a.sub.1 and a2 are handled as a complex number. A complex number operation unit 505 computes the absolute value a.sub.1.sup.2 +a2.sup.2 of the complex number. A signal indicating the absolute value a.sub.1.sup.2 +a2.sup.2 from the operation unit 505 passes through a band-pass filter (BPF) 506, and is applied to a timing error inferring unit 507, which monitors the output signal of the band-pass filter 506, and derives a deviation between the timings of transmission and reception from the output signal. The above deviation is output to an integrator 508 as a timing error signal TE. The integrator 508 integrates the timing error signals TE consecutively supplied from the unit 507. When an overflow OVF of integration occurs due to the fact that the value obtained by integrating the timing error signals TE exceeds a predetermined value, the integrator 508 sends an overflow signal OVF to a frequency-dividing counter 509, which controls the frequency of a basic clock signal and applies, as a sampling clock signal, a frequency-controlled clock signal to the A/D converter 501.
When the overflow OVF occurs, the sampling rate of the sampling clock signal is subjected to a feed-back control so that the timing error becomes zero. In this manner, the receiver can be synchronized with the transmitter.
The conventional timing reproduction device shown in FIG. 1 is suitable for communications systems using normal public lines, in which the timing between the transmitter and the receiver does not abruptly change. In such communications systems, it is sufficient to suppress steady timing error between the transmitter and the receiver after the receiver has been pulled into synchronism with the transmitter. The conventional timing reproduction device shown in FIG. 1 is suitable for the above communications systems.
However, the configuration shown in FIG. 1 is not suitable for communications systems in which the timing between the transmitter and the receiver abruptly changes. The typical examples of these communications systems are mobile communications systems, such as an automobile telephone system and a portable telephone system. A movable communications device is needed to switch to communicate with another ground station due to a change in the location of the movable communications device. When the timing between the transmitter and the receiver abruptly changes, the value held in the integrator 508 greatly changes. Hence, it takes a long time to pull the receiver into synchronism with the transmitter.